Processors: How a CPU Thinks

Part 1 — Switches that think

Picture a light with two switches wired one after the other: the bulb comes on only if switch A and switch B are on. Rewire them side by side and it comes on if A or B is on. You have just built two pieces of logic out of copper and plastic.

That small observation is the seed of every computer. In 1854 the English mathematician George Boole, then a professor at Queen's College, Cork, published An Investigation of the Laws of Thought. He showed that reasoning with "true" and "false" could be done as a kind of algebra, with its own rules for AND, OR and NOT. For eighty years it was mostly a curiosity for logicians.

Then, in 1937, a 21-year-old student at MIT named Claude Shannon wrote a master's thesis, published the next year as "A Symbolic Analysis of Relay and Switching Circuits". Shannon had worked on Vannevar Bush's differential analyzer, a room-sized calculating machine full of electromechanical parts, and had studied its tangle of switching circuits. He noticed that circuits of relays (switches opened and closed by an electromagnet) obey exactly Boole's algebra. That cut both ways. You could use the algebra to simplify messy circuits, such as the relay banks in telephone exchanges, and you could build circuits that do logic. The psychologist Howard Gardner later called it "possibly the most important, and also the most famous, master's thesis of the century."

Here is why that matters. Numbers can be written in binary, using only 0 and 1, and 0 and 1 can be "off" and "on". Once numbers are switches, arithmetic becomes logic. Adding two one-digit binary numbers needs just two rules:

Chain a few dozen of these "adders" together and you can add large numbers. Add circuits that compare, copy and choose, and you have the parts of a calculator. Add a way for the machine to follow a list of instructions stored in its own memory, and you have a computer.

A computer doesn't know arithmetic. It knows on and off, and a handful of rules for combining them.

A year before Shannon's thesis, Alan Turing had described, on paper, a machine that could carry out any computation by following simple rules (the companion piece on Turing lets you run one). Turing settled what a machine could compute. Shannon showed how switches could compute it. What was missing was a switch fast enough to make it worthwhile.

Part 2 — Valves, Colossus and ENIAC

Relays click. They are physical levers moved by magnets, so they are slow by electronic standards, and they wear out. The faster switch already existed in every radio: the vacuum tube, or "valve" in British English. John Ambrose Fleming patented a two-electrode tube in 1904, and Lee de Forest added a third electrode, the grid, in 1906–08. A small voltage on the grid controls a large current flowing through the tube. Used gently it is an amplifier; driven hard between fully off and fully on, it is a switch with no moving parts, able to flip far faster than any relay.

The catch: a tube is a hot, glowing filament in a glass bulb. It uses a lot of power and burns out like a light bulb, so a computer of tubes meant thousands of little heaters, some always failing.

Two wartime projects did it anyway:

ENIAC weighed more than 27 tonnes, drew about 150 kilowatts and could do some 5,000 additions a second. According to the Computer History Museum, it lost a tube every day or two, and its maintenance crews learned to find and fix a failure in about fifteen minutes. It had no program in the modern sense. To give it a new problem, its operators rewired it with cables and set thousands of switches, which could take days. The people who worked out how to do that were six women, Kay McNulty, Betty Jennings (later Jean Bartik), Betty Snyder (later Holberton), Marlyn Wescoff, Ruth Lichterman and Fran Bilas, whose part in the story was long overlooked.

"Which was the first computer?" has no single answer; it depends on the definition. Colossus was electronic and programmable, but built for one job and hidden by secrecy. ENIAC was general-purpose but programmed by rewiring. The idea that made both obsolete was written down in June 1945, in John von Neumann's First Draft of a Report on the EDVAC: keep the program in the same memory as the data, as a list of numbers the machine reads and obeys. Credit for that idea is disputed too. Eckert and Mauchly had discussed it before von Neumann wrote it up, and the report carried only his name. Almost every computer since, including the toy one later in this piece, is a "stored-program" machine.

ENIAC was reprogrammed with cables. The idea that replaced it was simple: store the instructions as numbers, in the same memory as everything else.

Part 3 — The transistor

The telephone network of the 1940s ran on tubes and mechanical relays, with all their drawbacks. At Bell Labs, the research arm of the American telephone system, Mervin Kelly encouraged the physicist William Shockley in early 1945 to set up a group studying semiconductors: materials such as germanium and silicon, which conduct electricity better than an insulator but worse than a metal, and whose conductivity can be controlled.

On 16 December 1947, two members of that group, John Bardeen and Walter Brattain, pressed two gold contacts, very close together, onto a slab of germanium using a plastic wedge. A small signal fed in at one contact came out up to 100 times stronger. A week later they showed it to the lab's managers. A colleague, John Pierce, came up with the name transistor, and Bell Labs announced it at a press conference in New York on 30 June 1948.

The human story is less tidy. Shockley, the group's leader, was not one of the two inventors, and the two sides disagreed about how the device worked. Within weeks, on 23 January 1948, he conceived a different, sturdier design, the junction transistor, which became the basis of the industry. The three men shared the 1956 Nobel Prize in Physics "for their researches on semiconductors and their discovery of the transistor effect." Two other claims hover over the credit. In 1925–28 the physicist Julius Lilienfeld patented the idea of a field-effect transistor, but never published a working device. And in 1948, in Paris, Herbert Mataré and Heinrich Welker independently built a point-contact transistor of their own, which their company rushed into production for the French telephone network.

How a transistor switches. Nearly all the transistors in today's chips are a later type, the MOSFET, demonstrated at Bell Labs by Mohamed Atalla and Dawon Kahng in 1959–60. Think of it as a tap for electricity. There are two terminals, the source and the drain, with a strip of silicon between them that normally doesn't conduct. Above that strip, separated by a whisper-thin layer of insulating glass, sits a third terminal, the gate. Put a voltage on the gate and its electric field pulls charges into the strip, opening a conducting channel: the tap is on. Remove the voltage and the channel vanishes: off. Nothing moves except electrons, and nothing needs to glow. Why silicon behaves this way is a story from quantum physics (see Quantum Mechanics: The Weirdness at the Bottom in Physics).

	Relay	Vacuum tube	Transistor (MOSFET)
What moves	A metal arm	Electrons through a vacuum	Electrons in a crystal
Heat	Some	Lots: a glowing filament	Very little per switch
Wears out?	Yes, mechanically	Yes, burns out	Essentially no
Can be shrunk?	Barely	Barely	Enormously, as we'll see

That last row is the whole story of the next seventy years. A widely cited estimate puts the number of MOSFETs ever made at more than 13 sextillion (13 followed by 21 zeros) by 2018, which would make them the most numerous things humans have ever manufactured.

Shockley left Bell Labs and, with backing from the instrument maker Arnold Beckman, set up Shockley Semiconductor Laboratory in Mountain View, California, in 1955–56, the first silicon company in what became Silicon Valley. He hired brilliantly and managed terribly; a biographer called him possibly "the worst manager in the history of electronics." In September 1957 eight of his researchers, including Robert Noyce, Gordon Moore and Jean Hoerni, quit together to start Fairchild Semiconductor. Shockley called them the "traitorous eight". In his later decades he became notorious for promoting racist eugenic ideas, which were rejected by scientists then and since. He is a reminder that a Nobel Prize in physics confers no authority on anything else.

Part 4 — The chip

By the late 1950s transistors were small and reliable, but every one still had to be made separately and wired to its neighbours by hand. A complex circuit meant thousands of hand-soldered joints, any of which could fail. The more ambitious the machine, the worse the problem.

The answer was to make all the parts, and the connections between them, out of one piece of semiconductor. Two men got there months apart, and the credit has been shared ever since:

Hoerni's contribution is often forgotten. Chipmakers used to strip off the protective oxide layer after using it as a stencil. Hoerni left it on, which protected the delicate junctions and left a flat ("planar") surface on which metal wiring could be printed. One historian called it "the most important innovation in the history of the semiconductor industry." Texas Instruments and Fairchild fought over the patents for years before settling on a cross-licence. The Computer History Museum's verdict is that Kilby made the first working circuit with all its parts made of semiconductor, Noyce made the version that could be manufactured, and both are fairly called co-inventors. Kilby received a share of the 2000 Nobel Prize in Physics "for his part in the invention of the integrated circuit," alongside Zhores Alferov and Herbert Kroemer, who were honoured for different work. Noyce had died in 1990, and the prize is not awarded posthumously.

Chips were expensive at first, so their first big customers were those who would pay anything for small and light. Every Apollo Moon flight carried two guidance computers built from Fairchild Micrologic chips, and the programme needed about 200,000 of them, making it the largest user of integrated circuits through 1965.

A computer on one chip. In 1968 Noyce and Moore left Fairchild to found Intel. In 1969 a Japanese calculator company, Busicom, asked Intel to design a set of twelve custom chips for a printing calculator. Ted Hoff and Stanley Mazor suggested something more radical: four chips, one of them a general-purpose processor that would run a program stored in memory, so the same hardware could become any calculator by changing the program. Federico Faggin, assisted by Masatoshi Shima, did the hard work of laying it out. The result, the Intel 4004, packed 2,300 transistors into a 16-pin package and ran at up to about 740 kHz, i.e. 740,000 clock ticks a second.

There was a twist. Busicom owned the rights. The calculator market was collapsing, Busicom wanted a lower price, and in May 1971 Intel bought back the rights for uses other than calculators by refunding Busicom's $60,000. Intel advertised the 4004 in Electronic News on 15 November 1971 as "a new era of integrated electronics." The "first microprocessor" title is contested here too: Four-Phase Systems had a processor slice working in 1969, and Garrett AiResearch built a chip set for the F-14 fighter's air-data computer in 1970. The 4004 is the one that was sold to anyone who wanted it, and that made all the difference.

The first commercial microprocessor began life as a calculator part, and its maker had to buy it back from a customer.

Part 5 — Inside the machine: fetch, decode, execute

Strip away the billions of transistors and a processor (a CPU, or central processing unit) is surprisingly simple to describe. It has:

Memory, a long row of numbered boxes ("cells"), each holding a number. The program and the data live here together.
Registers, a few boxes inside the processor itself, much faster to reach than memory. Our machine has one, the accumulator, where arithmetic happens.
The program counter, a register that holds the address of the next instruction.
The instruction register, which holds the instruction being worked on.
An arithmetic unit built from adders like the one in Part 1, and a control unit that runs the endless cycle:

Fetch → Decode → Execute → repeat

Fetch: copy the number at the address in the program counter into the instruction register, and add 1 to the program counter. Decode: work out what that number means. Execute: do it. That's it. Every program you have ever used, from a calculator to a video game to a chatbot, is this loop running billions of times a second.

The machine below is real in the sense that matters: it is a complete stored-program computer. It has 25 memory cells and understands five instructions. Each instruction is a three-digit number: the first digit says what to do, the last two say which cell to do it to. So 120 means "LOAD from cell 20".

Code	Instruction	What it does
1xx	LOAD xx	Copy the number in cell xx into the accumulator
2xx	ADD xx	Add the number in cell xx to the accumulator
3xx	STORE xx	Copy the accumulator into cell xx
4xx	JZ xx (jump if zero)	If the accumulator is 0, set the program counter to xx
000	HALT	Stop

Three things to notice as you step through:

Instructions are just numbers. Cell 0 of "Add two numbers" holds 120, and nothing marks it as an instruction except that the program counter happens to point at it. If a program stored a number into its own code area, it would change its own instructions. That is the stored-program idea, with all its power and danger; a whole class of security attacks consists of tricking a computer into treating data as code.

Loops are built from one jump. Our machine has no "go to" instruction, only "jump if zero". So "Count down" ends its loop by loading a cell that always holds 0 and then doing JZ 0, a jump that always happens. Real instruction sets have more conveniences, but every loop, if-statement and function call compiles down to jumps of this kind.

Not every program stops. Set "Count down" to start from −1 and run it. It subtracts forever, never hitting zero. Turing proved in 1936 that no method can look at every possible program and decide whether it will halt; our simulator just gives up after 1,000 instructions.

Multiplying 4 by 3 takes this machine 30 instructions and 90 clock ticks. A modern chip does far harder sums than that billions of times a second, but by the same loop.

Part 6 — Making it fast

If every processor runs the same loop, why is a 2026 phone so much faster than a 4004? There are four main reasons.

1. The clock. A processor's steps are paced by a clock, an oscillating signal that ticks billions of times a second. The 4004 managed about 740,000 ticks a second. Modern processors run at a few billion (several gigahertz), roughly 5,000 times faster. Faster switching came from smaller transistors, as Part 7 explains, but around 2005 clock speeds stopped rising much, for a reason we'll come to.

2. Caches. Our toy machine reads memory instantly. Real memory is not instant. The main memory chips sit centimetres away and are made for size, not speed, and the processor has outrun them for decades. Reaching main memory can be tens to hundreds of times slower than reaching a cache, a small, fast memory on the processor chip that holds copies of recently used data. Think of a desk, a bookshelf and a warehouse: what you're using sits on the desk (registers), what you used recently on the shelf (cache, often in two or three levels), and everything else in the warehouse (main memory). Most trips stop at the desk or the shelf.

3. Pipelining. Our machine finishes one instruction before starting the next. A laundry doesn't work like that: while load 1 is in the dryer, load 2 can be in the washer. Processors do the same, overlapping the phases of different instructions:

Without overlap, three instructions take nine ticks; with it, five, and once the pipeline is full one instruction finishes every tick. Real pipelines have many more stages, and modern processors go further: they work on several instructions at once, and reorder them when one is waiting for memory.

Pipelines have an awkward problem: jumps. When a JZ arrives, the processor doesn't yet know whether it will jump, but it has already started fetching what comes next. So it guesses, using a "branch predictor" that remembers what each jump did last time, and works ahead speculatively. A wrong guess means throwing the work away. Speculation is a big part of modern speed, and it has a cost. On 3 January 2018 researchers disclosed Spectre and Meltdown, flaws that let a malicious program learn secrets from traces left behind by discarded speculative work. They affected processors from Intel, AMD and IBM, and designs based on ARM.

4. More cores. When clock speeds stalled, chipmakers used their growing transistor budgets to put several complete processors, called cores, on one chip. Apple's M1 of 2020, for example, has eight CPU cores. But extra cores help only if the work can be split up. In 1967 Gene Amdahl pointed out the limit, now called Amdahl's law: the part of a job that must be done in sequence caps the speed-up. If 90% of a task can be split up, eight cores make it about 4.7 times faster, not eight; even with infinitely many cores the ceiling is ten. That limit is exactly why a different kind of chip, built for work that splits into millions of identical pieces, took over graphics and then AI. That is the subject of the next piece.

Part 7 — Moore's law

On 19 April 1965 the magazine Electronics published an article by Gordon Moore, then director of research at Fairchild, called "Cramming more components onto integrated circuits." Its key sentence: "The complexity for minimum component costs has increased at a rate of roughly a factor of two per year." Moore extrapolated that by 1975 the most economical chip would hold about 65,000 components.

Read that sentence again, because it is more subtle than the slogan. Moore was talking about cost. For any given manufacturing process there is a sweet spot: too few components per chip and you waste the chip; too many and so many chips are faulty that the cost per good part rises. Moore observed that the sweet spot was doubling every year. In 1975, by then at Intel, he revised the rate to a doubling about every two years. The physicist Carver Mead gave it the name "Moore's law". The often-quoted "every 18 months" was not Moore's figure. It came from an Intel executive, David House, who estimated that chip performance would double every 18 months, and Moore later said he never said 18 months.

From the 4004 to the M1 is about 23 doublings in 49 years: one roughly every 2.2 years, close to Moore's 1975 prediction for half a century. About seven million times more transistors. (Why something that doubles regularly becomes unimaginably large is the theme of Why Exponential Growth Rules Everything in Mathematics.)

It was never a law of nature. It was an observation that became a target. The whole industry, from the makers of chemicals and machines to the chip designers, planned their research around the next doubling, which helped make it come true. Intel itself now describes it as a projection, not a scientific law.

The free lunch, and its end. For three decades, shrinking transistors gave a bonus beyond numbers. In 1974 Robert Dennard and colleagues at IBM showed that if you shrink a transistor and lower its voltage in proportion, it switches faster while the power used per square millimetre stays the same. So every new generation was denser, faster and no hotter. This "Dennard scaling" broke down around 2005–07. Transistors became so small that they leak current even when "off", and voltages couldn't keep falling. Running them ever faster would have made chips too hot to cool. That is why clock speeds stalled in the mid-2000s and why your laptop has many cores rather than one 50-gigahertz one.

Slowing, not stopping. Transistor counts kept climbing, but more slowly and at much greater cost. In 2015 Intel's chief executive said its cadence was "closer to two and a half years than two." In September 2022 NVIDIA's Jensen Huang declared Moore's law dead; Intel's Pat Gelsinger publicly disagreed within days, though by the end of 2023 he too said the industry was "no longer in the golden era of Moore's Law." Who is right depends partly on what you measure: transistor counts at the top end are still climbing, helped by joining several pieces of silicon into one product, while the pace of each manufacturing generation has clearly slowed.

Moore's law was an economic observation that became a schedule. The industry kept it for fifty years because it decided to.

Part 8 — The languages of chips: x86, ARM and RISC-V

Our toy machine's five instructions are its instruction set architecture, or ISA: the vocabulary that software is translated into. A program compiled for one vocabulary won't run on a chip that speaks another, which is why the choice of ISA matters so much commercially. Three dominate the conversation in 2026.

x86. Intel's 8086 of 1978 began the family, and a cheaper variant, the 8088, went into the IBM PC in 1981. Because so much software was written for the PC, every later Intel and AMD chip kept speaking the same language, extended over time: to 32 bits with the 80386 in 1985 and to 64 bits by AMD between 1999 and 2003, an extension Intel then adopted. x86 is a "complex instruction set" (CISC): it has many instructions, some doing a lot of work. Since the mid-1990s, x86 chips have translated those complex instructions internally into simpler "micro-operations", so inside they work much like the next family. Only Intel and AMD actively make modern x86 designs.

RISC and ARM. In the late 1970s and early 1980s, researchers at IBM (John Cocke's 801 project, begun in 1975), at Berkeley (David Patterson) and at Stanford (John Hennessy) argued for a "reduced instruction set" (RISC): a small set of simple, regular instructions that a chip can pipeline efficiently, leaving the cleverness to the compiler. Hennessy and Patterson shared the 2017 Turing Award, computing's highest honour, for their quantitative approach to designing processors. In Cambridge, England, the home-computer maker Acorn took the idea and started its own RISC chip in October 1983. Sophie Wilson designed the instruction set, working with Steve Furber; the first ARM chips came back from the factory and worked on 26 April 1985. In 1990 the team was spun off, with Apple and VLSI Technology as partners, as Advanced RISC Machines. Arm's business model is unusual: it designs processors and licenses the designs and the instruction set, and other companies build the chips. Simple designs used little power, which suited battery devices, and Arm says more than 350 billion Arm-based chips have shipped. ARM designs run the iPhone and most Android phones. In November 2020 Apple launched the M1, its own ARM-based chip, and began replacing the Intel processors in its Macs.

RISC-V. In May 2010 Krste Asanović, Yunsup Lee and Andrew Waterman at Berkeley started a new instruction set that anyone could use without paying royalties. RISC-V (pronounced "risk five") is an open standard, like the rules of the web, rather than a product. Its governing body was incorporated in Switzerland in March 2020, after announcing the move with reference to concerns over US trade regulations. It has attracted strong interest in China, where an ISA that no foreign government can license away has obvious appeal.

Part 9 — How chips are made

A chip starts as a disc of extremely pure crystalline silicon, a wafer, today usually 300 mm (12 inches) across. On it, hundreds of identical chips are built at once, layer by layer, by a printing process called photolithography, adapted to silicon at Bell Labs in 1955 by Jules Andrus and Walter Bond.

Coat → Expose → Develop → Etch or implant → Repeat

The wafer is coated with a light-sensitive "resist". Light is shone through a mask, a stencil of one layer of the circuit, and focused through optics that shrink the pattern onto the wafer. Where the light lands, the resist changes chemically and can be washed away, leaving bare patches. Those patches are etched, or bombarded with impurity atoms to change the silicon's electrical behaviour, or filled with metal. Then the wafer is cleaned, coated and exposed again for the next layer. The transistors are built at the bottom; above them, many layers of copper wiring connect them. Each layer must line up precisely with the one below, all in "clean rooms" where a speck of dust can ruin a chip.

The basic limit is the wavelength of the light: you can't easily print lines much finer than the light you print them with. For years the workhorse was deep ultraviolet light at 193 nm, stretched with tricks such as putting highly purified water between the lens and the wafer, and splitting one layer's pattern across several masks. The next step, extreme ultraviolet (EUV) at 13.5 nm, took decades. ASML, the Dutch company that makes the machines, creates the light by firing two laser pulses at a tiny droplet of molten tin, up to 50,000 times a second, turning it into a glowing plasma. EUV is absorbed by everything, air and glass included, so the whole light path is in a vacuum and the "lenses" are mirrors, each reflecting only around 70% of the light. EUV entered high-volume manufacturing in 2019.

Only ASML makes EUV machines. Its standard models print features down to about 13 nm; its newer "High-NA" machines, the first delivered in December 2023, reach about 8 nm. Reported prices are around $200 million for a standard EUV tool and roughly $370 million for a High-NA one; a machine weighs about 180 tonnes and travels in three Boeing 747s. ASML reported 2025 sales of about €32.7 billion and employs more than 44,000 people.

The most advanced chips in the world depend on a machine that only one company can build, which makes light by vaporising droplets of tin 50,000 times a second.

Who makes the chips. Leading-edge factories, "fabs", are so expensive that only a handful of companies can build them; in March 2025 TSMC announced a further $100 billion of investment at its Arizona site alone. In 1987 Morris Chang founded the Taiwan Semiconductor Manufacturing Company (TSMC) on a then-odd idea: a "pure-play foundry" that makes chips only for other companies and designs none of its own. That let "fabless" companies such as Apple, NVIDIA, AMD and Qualcomm design chips without owning a factory. In 2025 TSMC made 12,682 different products for 534 customers. Intel and Samsung both design and manufacture; Intel has also opened its factories to outside customers.

What "3 nm" really means. Chip generations are named by "nodes": 7 nm, 5 nm, 3 nm, 2 nm. Until the mid-1990s the number roughly matched the length of a transistor's gate. Since then the names have drifted into marketing. As IEEE Spectrum put it, most of the critical features of a "7-nm" transistor are considerably larger than 7 nm. TSMC's "3 nm" process, in volume production since December 2022, has a spacing between transistor gates of roughly 45–48 nm and its tightest metal wires are about 23 nm apart. Nothing on the chip measures 3 nm. The node name means "our next generation, denser and more efficient than the last", and one company's 3 nm isn't directly comparable to another's.

What is changing at the leading edge is the shape of the transistor. Around 2011 the industry stood the channel up as a thin vertical fin (the "FinFET") so the gate could grip it on three sides. Now it is moving to "gate-all-around" designs, in which the channel is a stack of thin horizontal sheets with the gate wrapped all the way round: Samsung began production of its version in 2022, TSMC's first nanosheet process (N2) entered volume production in the last quarter of 2025, and Intel's 18A process ("RibbonFET") is in high-volume production in the United States. The next trick is moving the power wiring to the back of the chip, so signals and power stop competing for space on the front.

Part 10 — The state of affairs in 2026, and the open questions

A boom. According to the Semiconductor Industry Association, global chip sales in August 2026 were $159.7 billion for the month (a three-month moving average), 144% higher than a year earlier, and sales for 2026 passed $1 trillion by the end of August, the first time any year has reached that. The industry statisticians WSTS, in their spring 2026 forecast, expected the year to reach about $1.51 trillion, up 90%, with memory chips alone more than tripling in value. The fastest growth is in chips for data centres: NVIDIA alone reported $89 billion of data-centre revenue in the three months to late July 2026, as the next piece describes. TSMC's revenue for July–September 2026 was $46.7 billion, up 41% in dollars on a year earlier; 2 nm chips already made up 8% of its wafer revenue, 3 nm 33%, and processes of 7 nm or finer 79%.

The geography of chips. Design is spread around the world, but the most advanced manufacturing is concentrated: overwhelmingly at TSMC, in Taiwan, with Samsung in South Korea and Intel in the US the other contenders. According to a 2024 report by the SIA and Boston Consulting Group, the US share of world chip-making capacity fell from 37% in 1990 to 10% in 2022, and the US had no capacity below 10 nm in 2022, projected to rise to 28% by 2032 on the projects then announced. That concentration, on an island that China claims, is what turned chips into a matter of national security. The main moves, dated:

China, meanwhile, is investing heavily in its own chip industry. In June 2026 a Chinese machine, LineShine at the National Supercomputing Centre in Shenzhen, took first place on the TOP500 list of supercomputers at 2.2 exaflops, using only CPUs: home-grown 304-core processors, 13.8 million cores in all, with no separate accelerators. It shows that China can build a world-leading machine from domestic processors; what it says about the effect of export controls is argued both ways.

The arguments, at their strongest. Supporters of export controls argue that advanced chips are the engine of military AI, codebreaking and weapons design, that it would be reckless to sell them to a strategic rival, and that controls buy time. Critics argue that controls cost Western firms revenue that pays for their research, push China to build its own alternatives faster, and strain relations with allies whose companies lose sales; some also argue that the rules have shifted too often for businesses to plan around. On industrial policy, supporters say subsidies are the price of resilience against a blockade, an earthquake or a war in the Taiwan Strait, and match what rivals already do. Critics say they spend public money on profitable companies, risk building fabs the market won't fill, and, with the government holding equity in Intel, blur the line between state and market. Both sides agree on the underlying fact: the world depends on a very small number of companies and places for its most important technology.

Open questions.

How far can shrinking go? Gate-all-around transistors, backside power and, after that, transistors stacked on top of each other are on the research roadmaps; the Belgian research centre IMEC's roadmap runs to the mid-2030s. Increasingly, progress comes from packaging instead: several smaller "chiplets" joined side by side or stacked, which is how NVIDIA's Blackwell gets 208 billion transistors into one product.

Who pays? Each generation's factories and machines cost more, and fewer companies can afford the leading edge.

Power. A chip's performance is now limited more by heat than by transistor count, which is why so much effort goes into specialised processors that do one kind of work efficiently.

Whose vocabulary? Whether RISC-V becomes a third mainstream ISA, and whether politics splits the world into separate chip ecosystems, are both genuinely open.

Underneath all of it, the machine is the one from Part 5: fetch, decode, execute, a few billion times a second, on switches too small to see.